Preface Acknowledgements Chapter 1: History of Embedded and Fan-Out Packaging Technology Michael Töpper, Andreas Ostmann, Tanja Braun, Klaus-Dieter Lang Chapter 2: FO-WLP Market and Technology Trends E. Jan Vardaman Chapter 3: Embedded Wafer-Level Ball Grid Array (eWLB) Packaging Technology Platform Thorsten Meyer, Steffen Kroehnert Chapter 4: Ultra-Thin 3D FO-WLP eWLB-PoP (embedded Wafer Level Ball Grid Array - Package on Package) Technology S.W. Yoon Chapter 5: NEPES' Fan out Packaging Technology from Single die, SiP to Panel Level Packaging Jong Heon (Jay) Kim Chapter 6: M-Series(tm) Fan-out with Adaptive Patterning(tm) Tim Olson, Chris Scanlan Chapter 7: SWIFT® Semiconductor Packaging Technology Ron Huemoeller, Curtis Zwenger Chapter 8: Embedded Silicon Fan-Out (eSiFO®) Technology for Wafer Level System Integration Daquan Yu Chapter 9: Embedding of Active and Passive Devices by Using an Embedded Interposer - the i² Board Technology Thomas Gottwald, Christian Roessle, Alexander Neumann Chapter 10: Embedding of Power Electronic Components: The Smart p² Pack Technology Thomas Gottwald, Christian Roessle Chapter 11: Embedded Die in Substrate (Panel-Level) Packaging Technology Tomoko Takahashi, Akio Katsumata Chapter 12: Blade: A Chip First Embedded Technology for Power Packaging Boris Plikat, Thorsten Scharf Chapter 13: The Role of Liquid Molding Compounds in the Success of Fan-Out Wafer Level Packaging Technology Katsushi Kan, Michiyasu Sugahara, Markus Cichon Chapter 14: Advanced Dielectric Materials (Polyimides and Polybenzoxazoles) for Fan-out Wafer Level Packaging (FO-WLP) T. Enomoto, J.I. Matthews, T. Motobe Chapter 15: Enabling Low Temperature Cure Dielectrics for Advanced Aafer Level Packaging Stefan Vanclooster, Dimitri Janssen Chapter 16: The Role of Pick and Place in Fan-Out Wafer Level Packaging Hugo Pristauz, Alastair Attard, Harald Meixner Chapter 17: Process and Equipment for eWLB - Chip Embedding by Molding Edward Fürgut, Hirohito Oshimori, Hiroaki Yamagishi Chapter 18: Tools for Fan-Out Wafer Level Package Processing Nelson Fan, Eric Kuah, Eric Ng, Otto Cheung Chapter 19: Equipment and Process for eWLB - Required PVD/Sputter Solutions Chris Jones, Ricardo Gaio, José Castro Chapter 20: Excimer Laser Ablation for Patterning of Ultra-fine Routings Habib Hichri, Markus Arendt, Seongkuk Lee Chapter 21: Temporary Carrier Technologies for eWLB and RDL-First Fan-Out Wafer Level Packages Thomas Uhrmann, Boris PovaÂzay Chapter 22: Encapsulated Wafer Level Package Technology (eWLCSP) - Robust WLCSP Reliability with Sidewall Protection S.
W. Yoon Chapter 23: Embedded Multi-Die Interconnect Bridge (EMIB) - A Localized, High Density, High Bandwidth Packaging Interconnect Ravi Mahajan, Robert Sankman, Kemal Aygun, Zhiguo Qian, Ashish Dhall, Jonathan Rosch, Debendra Mallik, Islam Salama Chapter 24: Interconnection Technology Innovations in 2.5D Integrated Electronic Systems Paragkumar A. Thadesar, Paul K. Jo, Muhannad S. Bakir Index.